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Epicareer might not working properly because your browser javascript is turned off.

What is JavaScript?

JavaScript is like the magic behind making websites interactive. Basically, it makes Epicareer more enjoyable and engaging.
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Find tutorial for your browser below :
  1. Make sure the webpage is open.
  2. In the Safari app on your Mac, choose Safari > Preferences, then click Security.
  3. Make sure the Enable JavaScript checkbox is selected.
  4. Click Websites.
  5. On the left, click Content Blockers.
  6. Make sure Off is chosen in the pop-up menu next to the website.
  7. On the left, click Pop-up Windows.
  8. Make sure Allow is chosen in the pop-up menu next to the website.
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  1. Open Chrome on your computer.
  2. Click. then Settings.
  3. Click Privacy and Security.
  4. Click Site settings.
  5. Click JavaScript.
  6. Select Sites can use Javascript.
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  1. If you're running Windows OS, in the Firefox window, click Tools > Options.
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  1. Click the "Settings and more" icon at the top right of the Edge browser window.
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  4. Scroll down and click on JavaScript.
  5. In the JavaScript window, toggle the slider to "on" or "allowed."
  6. Close the Settings tab.
  7. Refresh the page.
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  1. Go to Settings.
  2. Click Advanced in the left sidebar, and click Privacy & security.
  3. Under Privacy and security, click Site settings.
  4. Click JavaScript.
  5. At the top, turn on or off Allowed (recommended).
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Jobs or company...

Digital IC Design Engineer

$ 6,000 - $ 9,000 / month
Checking job availability...
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Job Description:

We are looking for a talented Digital IC Design Engineer (SoC) to join our growing team in Singapore. In this role, you will be involved to develop the next-generation AI chips based on a revolutionary architecture. You will work closely with verification, front-end, and software teams to deliver high-quality digital IC solutions. This is an excellent opportunity for junior engineers to develop their skills and gain hands-on experience in advanced SoC design projects.

Key Responsibilities:

  • Contribute to RTL design of SoC modules and assist in IP core integration.
  • Support chip-level system design tasks, including clock/reset architecture, low-power design techniques, and bus architecture.
  • Collaborate with verification and testing teams to perform module-level and system-level validation.
  • Assist front-end engineers in netlist delivery and help resolve timing issues.
  • Provide support for driver development, debugging, and technical documentation.

Requirements:

  • Bachelor’s degree or higher in Electrical Engineering (or equivalent).
  • Within 5 years of relevant experience in digital IC/ASIC design.
  • Strong understanding of digital circuit fundamentals and proficiency in Verilog HDL.
  • Familiarity with ASIC design flow and EDA tools (e.g., Synopsys, Cadence).
  • Basic understanding of CPU and Cache architectures, instruction set architectures (ISA), and compiler principles.
  • Knowledge of bus systems, DMA, and peripheral interface design.
  • Awareness of low-power design methodologies.

Preferred Qualifications:

  • Internship or project experience in SoC or ASIC design.
  • Familiarity with standard bus protocols (e.g., AMBA, AXI, AHB, APB).
  • Exposure to synthesis, timing analysis, or DFT concepts.
  • Good problem-solving skills and eagerness to learn in a collaborative environment.
  • Strong communication skills and ability to document technical work clearly.

Job Description:

We are looking for a talented Digital IC Design Engineer (SoC) to join our growing team in Singapore. In this role, you will be involved to develop the next-generation AI chips based on a revolutionary architecture. You will work closely with verification, front-end, and software teams to deliver high-quality digital IC solutions. This is an excellent opportunity for junior engineers to develop their skills and gain hands-on experience in advanced SoC design projects.

Key Responsibilities:

  • Contribute to RTL design of SoC modules and assist in IP core integration.
  • Support chip-level system design tasks, including clock/reset architecture, low-power design techniques, and bus architecture.
  • Collaborate with verification and testing teams to perform module-level and system-level validation.
  • Assist front-end engineers in netlist delivery and help resolve timing issues.
  • Provide support for driver development, debugging, and technical documentation.

Requirements:

  • Bachelor’s degree or higher in Electrical Engineering (or equivalent).
  • Within 5 years of relevant experience in digital IC/ASIC design.
  • Strong understanding of digital circuit fundamentals and proficiency in Verilog HDL.
  • Familiarity with ASIC design flow and EDA tools (e.g., Synopsys, Cadence).
  • Basic understanding of CPU and Cache architectures, instruction set architectures (ISA), and compiler principles.
  • Knowledge of bus systems, DMA, and peripheral interface design.
  • Awareness of low-power design methodologies.

Preferred Qualifications:

  • Internship or project experience in SoC or ASIC design.
  • Familiarity with standard bus protocols (e.g., AMBA, AXI, AHB, APB).
  • Exposure to synthesis, timing analysis, or DFT concepts.
  • Good problem-solving skills and eagerness to learn in a collaborative environment.
  • Strong communication skills and ability to document technical work clearly.