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Research Fellow (Integrated Circuits)

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Accept ClosePress Tab to Move to Skip to Content LinkSearch JobsJob DescriptionJob Title: Research Fellow (Integrated Circuits)Posting Start Date: 10/03/2025Job Description:Job DescriptionWe are seeking a highly skilled and innovative Integrated Circuit (IC) Design Research Fellow to join our cutting-edge research and development team. The successful candidate will play a critical role in designing and developing next-generation Brain-Machine Interface (BMI) integrated circuits, pushing the boundaries of neurotechnology and human-computer interaction.Key Responsibilities:
1) Design, simulate, and implement low-power, high-performance ICs for brain-machine interface applications.
2) Develop mixed-signal (analog/digital) circuits for neural signal acquisition, processing, and stimulation.
3) Collaborate with neuroscientists, biomedical engineers, and system architects to define specifications and optimize circuit performance.
4) Conduct layout design and verification, ensuring compliance with industry standards and fabrication requirements.
5) Implement power-efficient and low-noise circuit techniques suitable for implantable or wearable BMI systems.
6) Perform chip testing, characterization, and debugging to validate functionality and optimize performance.
7) Work closely with fabrication partners and foundries to ensure successful tape-out and manufacturing processes.
8) Contribute to research publications, patents, and technical documentation.QualificationsQualifications and Skills:
1) Ph.D. in Electrical Engineering, Computer Engineering, or a related field with a focus on IC design.
2) Proficiency in EDA tools such as Cadence Virtuoso, Synopsys, Mentor Graphics, and SPICE simulators.
3) Strong understanding of neural interfaces, bioelectronic circuits, and signal processing techniques.
4) Familiarity with low-power design methodologies, noise reduction techniques, and biomedical constraints.
5) Hands-on experience with IC tape-out processes, testing, and validation.
6) At least 2 top conference and journal publications in IC design field (IEEE ISSCC, VLSI Circuits, JSSC).
By continuing to use and navigate this website, you are agreeing to the use of cookies.
Accept ClosePress Tab to Move to Skip to Content LinkSearch JobsJob DescriptionJob Title: Research Fellow (Integrated Circuits)Posting Start Date: 10/03/2025Job Description:Job DescriptionWe are seeking a highly skilled and innovative Integrated Circuit (IC) Design Research Fellow to join our cutting-edge research and development team. The successful candidate will play a critical role in designing and developing next-generation Brain-Machine Interface (BMI) integrated circuits, pushing the boundaries of neurotechnology and human-computer interaction.Key Responsibilities:
1) Design, simulate, and implement low-power, high-performance ICs for brain-machine interface applications.
2) Develop mixed-signal (analog/digital) circuits for neural signal acquisition, processing, and stimulation.
3) Collaborate with neuroscientists, biomedical engineers, and system architects to define specifications and optimize circuit performance.
4) Conduct layout design and verification, ensuring compliance with industry standards and fabrication requirements.
5) Implement power-efficient and low-noise circuit techniques suitable for implantable or wearable BMI systems.
6) Perform chip testing, characterization, and debugging to validate functionality and optimize performance.
7) Work closely with fabrication partners and foundries to ensure successful tape-out and manufacturing processes.
8) Contribute to research publications, patents, and technical documentation.QualificationsQualifications and Skills:
1) Ph.D. in Electrical Engineering, Computer Engineering, or a related field with a focus on IC design.
2) Proficiency in EDA tools such as Cadence Virtuoso, Synopsys, Mentor Graphics, and SPICE simulators.
3) Strong understanding of neural interfaces, bioelectronic circuits, and signal processing techniques.
4) Familiarity with low-power design methodologies, noise reduction techniques, and biomedical constraints.
5) Hands-on experience with IC tape-out processes, testing, and validation.
6) At least 2 top conference and journal publications in IC design field (IEEE ISSCC, VLSI Circuits, JSSC).