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Job Description
- As aPhysicalDesign(PD) engineer, you will be working on PD execution spanning from RTL to GDS with focus on Synthesis, Floorplan, Block P&R, Clocking, Constraints, STA signoff andPhysicalVerification etc. as part of PD team.
- Implementing RTL to GDS2 flow
- Handling Floor-plan,PhysicalImplementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction,PhysicalVerification (DRC & LVS), Crosstalk Analysis, EM/IR, Formal Equivalence
- Handling different PNR tools - Synopsys Fusion Compiler, ICC2,DesignCompiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk, Cadence Genus, Innovus.
- Tasks to include Full Chip Level Floor planning, Bus / Pin Planning, feed-thru planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis,PhysicalVerification and Sign Off
- Identify complex technical problems, break them down, summarize multiple possible solutions
- Drive and hands-on flow development and scripting
- Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications.
- Experience in automateddesignflows for clock tree synthesis, clock and power gating techniques, scan stitching,designoptimization for improved timing/power/area, anddesigncycle time reduction.
- Experience in floorplanning, establishingdesignmethodology, IP integration, checks for logic equivalence,physical/timing/electrical quality, and final signoff for large IP delivery
- Strong experience with tools for logic synthesis, place and route, timing analysis, anddesignchecks forphysicaland electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation
- Versatility with scripts to automatedesignflow. Good at scripting, like Python/perl/Tcl/shell
- Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5nm
- Familiar with Unix/Linux environment
- Good understanding of computer organization/architecture is preferred.
- Strong analytical/problem solving skills and pronounced attention to details.
Job Description
- As aPhysicalDesign(PD) engineer, you will be working on PD execution spanning from RTL to GDS with focus on Synthesis, Floorplan, Block P&R, Clocking, Constraints, STA signoff andPhysicalVerification etc. as part of PD team.
- Implementing RTL to GDS2 flow
- Handling Floor-plan,PhysicalImplementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction,PhysicalVerification (DRC & LVS), Crosstalk Analysis, EM/IR, Formal Equivalence
- Handling different PNR tools - Synopsys Fusion Compiler, ICC2,DesignCompiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk, Cadence Genus, Innovus.
- Tasks to include Full Chip Level Floor planning, Bus / Pin Planning, feed-thru planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis,PhysicalVerification and Sign Off
- Identify complex technical problems, break them down, summarize multiple possible solutions
- Drive and hands-on flow development and scripting
- Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications.
- Experience in automateddesignflows for clock tree synthesis, clock and power gating techniques, scan stitching,designoptimization for improved timing/power/area, anddesigncycle time reduction.
- Experience in floorplanning, establishingdesignmethodology, IP integration, checks for logic equivalence,physical/timing/electrical quality, and final signoff for large IP delivery
- Strong experience with tools for logic synthesis, place and route, timing analysis, anddesignchecks forphysicaland electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation
- Versatility with scripts to automatedesignflow. Good at scripting, like Python/perl/Tcl/shell
- Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5nm
- Familiar with Unix/Linux environment
- Good understanding of computer organization/architecture is preferred.
- Strong analytical/problem solving skills and pronounced attention to details.