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Senior Test Engineer

$ 4,500 - $ 7,500 / month

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Key Responsibilities:

  • Develop/debug ATE test programs for Digital, PMIC, RF, and Mixed Signal products.
  • Support first silicon debug, characterization, and production release.
  • Debug digital vectors (JTAG, SCAN, ATPG, Functional, Mbist).
  • Characterize PVT corners, Mixed Signal IP (ADC, DAC, PLL).
  • Drive test program hand-off, yield improvement, and test time reduction.
  • Collaborate with Design, Product, Quality, and Foundry Engineering teams.

Job Requirements:

  • Diploma/Degree in Electronics, Electrical, or Communication Engineering.
  • 5-8 years in semiconductor testing, 3+ years on Advantest 93k or Teradyne UFLEX/iFLEX.
  • Experience in ATE SoC program development (NPI to volume ramp).
  • Proficiency in Java, C/C++, Visual Basic, Perl, Python.
  • Strong knowledge of analog/digital electronics, statistical analysis, and reliability testing.
  • Excellent problem-solving, lab work, and communication skills.

Preferred:

  • Experience in yield improvement, test time reduction, Mixed Signal IP testing.
  • Knowledge of test program optimization and production release.